module top_module( 
    input x3,
    input x2,
    input x1,
    output f
);

    wire	in0;
    wire	out0;
    wire	out1;
    
    not	not1	(in0, x3);
    and	and1	(out0, in0, x2);
    and	and2	(out1, x3, x1);
    or	or1		(f, out0, out1);
    
endmodule
